8,031 Patent Results (1,791 families)
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Methods Of Fabricating Shield Plates For Reduced Field Coupling In Nonvolatile Memory

  • Published: Jul 10, 2008
  • Filed: Dec 24, 2007
  • Earliest Priority: Dec 28 2006
  • Family: 5
  • Cited Works: 0
  • Cited by: 0
  • Cites: 3
  • Additional Info: Full text
  • Applicant: Sandisk Corp, Yuan Jack H
Patent Application
WO 2008/083134 A1
096-463-058-858-661

Method Of Manufacturing Non-volatile Memory Cell

  • Published: Jan 20, 2009
  • Filed: Aug 8, 2006
  • Earliest Priority: Aug 13 2004
  • Family: 4
  • Cited Works: 0
  • Cited by: 1
  • Cites: 5
  • Additional Info: Full text
  • Owner: United Microelectronics Corp
  • Applicant: United Microelectronics Corp
Granted Patent
US 7479426 B2
046-874-908-084-889

Non-volatile Dram With Floating Gate And Method Of Operation

  • Published: Jan 15, 2009
  • Filed: Jul 12, 2007
  • Earliest Priority: Jul 12 2007
  • Family: 5
  • Cited Works: 0
  • Cited by: 19
  • Cites: 32
  • Additional Info: Full text
  • Owner: Silicon Storage Technology Inc
  • Applicant: Silicon Storage Tech Inc
Patent Application
US 2009/0016118 A1
145-241-085-840-848

Memory And Method For Fabricating The Same

  • Published: Jan 29, 2009
  • Filed: Oct 16, 2007
  • Earliest Priority: Jul 23 2007
  • Family: 2
  • Cited Works: 0
  • Cited by: 9
  • Cites: 0
  • Additional Info: Full text
  • Owner: Powerchip Semiconductor Corp
  • Applicant: Powerchip Semiconductor Corp
Patent Application
US 2009/0026525 A1
019-025-567-624-174

Nonvolatile Semiconductor Storage Device And Manufacturing Method Therefor

  • Published: Feb 10, 2009
  • Filed: Sep 13, 2005
  • Earliest Priority: Mar 24 2005
  • Family: 9
  • Cited Works: 5
  • Cited by: 6
  • Cites: 10
  • Additional Info: Cited Works Full text
  • Owner: Kabushiki Kaisha Toshiba
  • Applicant: Toshiba Kk
Granted Patent
US 7489006 B2
162-122-623-437-453

Self-aligned Split-gate Nonvolatile Memory Structure And A Method Of Making The Same

  • Published: Feb 17, 2009
  • Filed: Jun 1, 2006
  • Earliest Priority: Feb 04 2004
  • Family: 11
  • Cited Works: 1
  • Cited by: 0
  • Cites: 21
  • Additional Info: Full text
  • Applicant: Samsung Electronics Co Ltd
Granted Patent
US 7492000 B2
181-359-885-100-708

Negative Differential Resistance Pull Up Element For Dram

  • Published: Feb 12, 2009
  • Filed: Oct 13, 2008
  • Earliest Priority: Dec 21 2001
  • Family: 4
  • Cited Works: 0
  • Cited by: 11
  • Cites: 91
  • Additional Info: Full text Published
  • Applicant: Synopsys Inc
Patent Application
US 2009/0039438 A1
035-126-290-827-157

Apparatus And Method For A Memory Array With Shallow Trench Isolation Regions Between Bit Lines For Increased Process Margins

  • Published: Feb 19, 2009
  • Filed: Aug 6, 2008
  • Earliest Priority: Jul 20 2004
  • Family: 3
  • Cited Works: 0
  • Cited by: 3
  • Cites: 11
  • Additional Info: Full text
  • Owner: Cypress Semiconductor Corporation, Spansion Llc
  • Applicant: Torii Satoshi
Patent Application
US 2009/0047762 A1
052-754-011-317-431

Erasing Method Of Non-volatile Memory

  • Published: Mar 5, 2009
  • Filed: Nov 13, 2008
  • Earliest Priority: Oct 26 2006
  • Family: 6
  • Cited Works: 0
  • Cited by: 0
  • Cites: 7
  • Additional Info: Full text
  • Applicant: Episil Technologies Inc
Patent Application
US 2009/0059679 A1
090-158-577-332-742

Method For Manufacturing Trench Isolation Structure And Non-volatile Memory

  • Published: Mar 5, 2009
  • Filed: Nov 26, 2007
  • Earliest Priority: Sep 03 2007
  • Family: 4
  • Cited Works: 0
  • Cited by: 7
  • Cites: 11
  • Additional Info: Full text
  • Owner: Nanya Technology Corporation
  • Applicant: Nanya Technology Corp
Patent Application
US 2009/0061581 A1
127-554-185-612-222
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