{"search_session":{},"preferences":{"l":"en","queryLanguage":"en"},"patentId":"163-292-823-549-984","frontPageModel":{"patentViewModel":{"ref":{"entityRefType":"PATENT","entityRefId":"163-292-823-549-984"},"entityMetadata":{"linkedIds":{"empty":true},"tags":[],"collections":[{"id":6800,"type":"PATENT","title":"Adelaide Patent Portfolio","description":"
Copied from Raj's collection ' Univ of Adelaide'
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Search Applicants= ' Univ* Adel*' , '\"Adel* \"AND \"Univ*\"', ' Adel* Univ' , 'Adel* Res* Inno*' ,Adel* NEAR Res* NEAR Inno*.
Search Owners (US) = ' Univ* Adel*' , '\"Adel* \"AND \"Univ*\"', ' Adel* Univ', 'Adel* Res* Inno*' Adel* NEAR Res* NEAR Inno*.
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\n","access":"OPEN_ACCESS","displayAvatar":true,"attested":false,"itemCount":1585,"tags":[],"user":{"id":91044780,"username":"Cambialens","firstName":"","lastName":"","created":"2015-05-04T00:55:26.000Z","displayName":"Cambialens","preferences":"{\"usage\":\"public\",\"beta\":false}","accountType":"PERSONAL","isOauthOnly":false},"notes":[],"sharedType":"PUBLISHED","hasLinkedSavedQueries":false,"savedQueries":[],"created":"2015-05-04T01:38:33Z","updated":"2015-05-29T03:23:48Z","lastEventDate":"2015-05-29T03:23:48Z"},{"id":10826,"type":"PATENT","title":"KU Leuven - Patent Portfolio","description":"","access":"OPEN_ACCESS","displayAvatar":true,"attested":false,"itemCount":7336,"tags":[],"user":{"id":91044780,"username":"Cambialens","firstName":"","lastName":"","created":"2015-05-04T00:55:26.000Z","displayName":"Cambialens","preferences":"{\"usage\":\"public\",\"beta\":false}","accountType":"PERSONAL","isOauthOnly":false},"notes":[{"id":8278,"type":"COLLECTION","user":{"id":91044780,"username":"Cambialens","firstName":"","lastName":"","created":"2015-05-04T00:55:26.000Z","displayName":"Cambialens","preferences":"{\"usage\":\"public\",\"beta\":false}","accountType":"PERSONAL","isOauthOnly":false},"text":"Search Applicants and Owners separately: univ* AND Leuven;
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Copied from Raj's collection ' Univ of Adelaide'
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Search Applicants= ' Univ* Adel*' , '\"Adel* \"AND \"Univ*\"', ' Adel* Univ' , 'Adel* Res* Inno*' ,Adel* NEAR Res* NEAR Inno*.
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\n","access":"OPEN_ACCESS","displayAvatar":true,"attested":false,"itemCount":1585,"tags":[],"user":{"id":91044780,"username":"Cambialens","firstName":"","lastName":"","created":"2015-05-04T00:55:26.000Z","displayName":"Cambialens","preferences":"{\"usage\":\"public\",\"beta\":false}","accountType":"PERSONAL","isOauthOnly":false},"notes":[],"sharedType":"PUBLISHED","hasLinkedSavedQueries":false,"savedQueries":[],"created":"2015-05-04T01:38:33Z","updated":"2015-05-29T03:23:48Z","lastEventDate":"2015-05-29T03:23:48Z"},{"id":10826,"type":"PATENT","title":"KU Leuven - Patent Portfolio","description":"","access":"OPEN_ACCESS","displayAvatar":true,"attested":false,"itemCount":7336,"tags":[],"user":{"id":91044780,"username":"Cambialens","firstName":"","lastName":"","created":"2015-05-04T00:55:26.000Z","displayName":"Cambialens","preferences":"{\"usage\":\"public\",\"beta\":false}","accountType":"PERSONAL","isOauthOnly":false},"notes":[{"id":8278,"type":"COLLECTION","user":{"id":91044780,"username":"Cambialens","firstName":"","lastName":"","created":"2015-05-04T00:55:26.000Z","displayName":"Cambialens","preferences":"{\"usage\":\"public\",\"beta\":false}","accountType":"PERSONAL","isOauthOnly":false},"text":"Search Applicants and Owners separately: univ* AND Leuven;
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- providing gate stack layers comprising at least a channel layer, a high-k dielectric layer, and a metal gate layer,
- then exposing said gate stack layers to a fluorine comprising plasma, and then,
- submitting said exposed gate stack layers to a thermal treatment, wherein the temperature is higher than 700°C."],"number":1,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 1, wherein exposing said gate stack layers to said fluorine comprising plasma is performed during the patterning of said gate stack layers."],"number":2,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 1 or 2, wherein said step of exposing said gate stack layers to said fluorine comprising plasma is performed simultaneously with or after the dry etching of said gate stack layers."],"number":3,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 or 2, wherein said step of exposing said gate stack layers to said fluorine comprising plasma consists of a dry etching of said metal gate using said fluorine comprising plasma."],"number":4,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 4, wherein said fluorine comprising plasma is a SF6 comprising plasma."],"number":5,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 5, wherein said fluorine comprising plasma further comprises O2."],"number":6,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 5 or 6, wherein said fluorine comprising plasma comprises a mixture of SF6 and O2."],"number":7,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 7, wherein, prior to exposing said gate stack layers to said fluorine comprising plasma, said metal gate layer is partially etched by a BCl3 comprising plasma."],"number":8,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 8, wherein said partially etched metal gate layer is further, completely, etched by said fluorine comprising plasma."],"number":9,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 8 or 9, wherein said BCl3 comprising plasma further comprises Cl2."],"number":10,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 10, wherein said gate stack layers further comprise a capping layer onto the metal gate layer, such as poly-Si."],"number":11,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 11, wherein said metal gate layer is a TiN, TaN, TiN/TaN, TaC, WN2, TiW, WSi2, MoSi2, Mo, Ti, or a W comprising layer."],"number":12,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 12, wherein said metal gate layer is a dual metal gate."],"number":13,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 13, wherein said dielectric layer is an Hf comprising layer."],"number":14,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 14, wherein said Hf comprising layer is an HfO2 comprising layer."],"number":15,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 14, wherein said Hf comprising layer is a hafnium silicon oxide comprising layer."],"number":16,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 16, wherein said channel layer comprises at least Si."],"number":17,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 17, wherein said channel layer comprises at least Ge."],"number":18,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 18, wherein said channel layer comprises at least a group III/V element."],"number":19,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 19, wherein said thermal treatment is performed for at least 2 minutes."],"number":20,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 20, wherein said thermal treatment step is performed during a Selective Epitaxial growth process, or during a Rapid Thermal Anneal step."],"number":21,"annotation":false,"title":false,"claim":true},{"lines":["A method according to any of claims 1 to 21 for the manufacture of a semiconductor device."],"number":22,"annotation":false,"title":false,"claim":true},{"lines":["A method according to claim 22, wherein said semiconductor device is a multiple gate device, said channel layer can be a fin."],"number":23,"annotation":false,"title":false,"claim":true},{"lines":["A semiconductor device obtainable by a method according to any of claims 1 to 21."],"number":24,"annotation":false,"title":false,"claim":true}]}},"filters":{"npl":[],"notNpl":[],"applicant":[],"notApplicant":[],"inventor":[],"notInventor":[],"owner":[],"notOwner":[],"tags":[],"dates":[],"types":[],"notTypes":[],"j":[],"notJ":[],"fj":[],"notFj":[],"classIpcr":[],"notClassIpcr":[],"classNat":[],"notClassNat":[],"classCpc":[],"notClassCpc":[],"so":[],"notSo":[],"sat":[]},"sequenceFilters":{"s":"SEQIDNO","d":"ASCENDING","p":0,"n":10,"sp":[],"si":[],"len":[],"t":[],"loc":[]}}